Programmable integrated circuits (e.g., a field programmable gate array (FPGA), programmable logic device (PLD)) can contain a packet network structure known as a network on a chip (NoC) which is programmed using a network referred to herein as a NoC configuration network (NCN). The NCN includes multiple switches which route packets between configurable logic. The NoC and the NCN are complex packet protocol networks spread through the PLD which makes testing these networks difficult.